How does SMT select electronic components

535 Published by FASTPCBA 8月 23,2018

How does SMT select electronic components

In SMT assembly process, product design for SMT surface mount component selection and design of a key ring is very important, so in the design of the initial stage must be to determine the components of electrical properties and functions in detail, in the back of the SMT design stage to requirement of surface mount components packaging form and structure.Surface mounted solder joints are both mechanical and electrical connection points, and reasonable selection has a decisive impact on improving PCB design density, productivity, testability and reliability.

There is no difference between the function of the surface mounted component and the inserted component. The difference lies in the encapsulation of the component.Surface mounted packages must withstand high temperatures during welding and their components and substrate must have a matching coefficient of thermal expansion.These factors must be taken into account in product design.

Selection of surface mounting components

Surface mounted components are divided into active and passive components.There are gull-wing and “J” models according to the pin shape.The following classification explains the selection of components.

1. Passive device

Passive components include single chip ceramic capacitors, tantalum capacitors and thick film resistors in rectangular or cylindrical shape.Cylindrical passive device is called “MELF”. It is easy to roll when re – flow welding is adopted. Special pad design is required.Rectangular passive components are called “CHIP” CHIP components. They are small in size, light in weight, have good impact resistance, shock resistance and parasitic loss, and are widely used in various electronic products.In order to obtain good weldability, electroplating of nickel bottom barrier layer must be selected.

2. Active devices

There are two main types of surface mounted chip carriers: ceramic and plastic.

The advantages of ceramic chip packaging are:

1) good air tightness and good protection of internal structure

2) the signal path is short, and the parasitic parameters, noise and delay characteristics are significantly improved

3) reduce power consumption.The disadvantage is that no pins absorb the stress produced when the solder paste is dissolved, and CTE mismatch between the package and the substrate can lead to weld spot cracking during welding.

The most commonly used ceramic chip carrier is the lead-free ceramic chip carrier LCCC.

Plastic packaging is widely used in military, civilian products production, with good cost performance.Its packaging form is divided into: small shape transistor SOT;Small shape integrated circuit SOIC;Plastic with lead chip carrier PLCC;Small J package;Plastic flat package PQFP.

In order to effectively reduce the PCB area, SOIC with the number of pins below 20 and PLCC with the number of pins between 20-84 are preferred under the same device function and performance, and PQFP with the number of pins greater than 84 is preferred.electronic components

2. The advantages of choosing appropriate packaging are as follows:

1. Save PCB area effectively;

2. Provide better electrical performance;

3. Protect the internal components from humidity and other environmental effects;

4. Provide good communication links;

5. Help heat dissipation and facilitate transmission and testing

Electronic components

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